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TypeBare Act JurisdictionCentral Government

Semiconductor Integrated Circuits Layoutdesign Act, 2000 Section 19

Registration to be prima facie evidence of validity.—

~1 min read
https://sooperkanoon.com/act/464327

Bare act section · Research

About this section

Semiconductor Integrated Circuits Layoutdesign Act, 2000 Section 19 is part of Semiconductor Integrated Circuits Layoutdesign Act, 2000 - Registration to be prima facie evidence of validity.—. Read the section text below and explore Indian court judgments that cite it.

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Section Text

1) In all legal proceedings relating to a
layout-design registered under this Act (including application under section 30), the original registration
of the layout-design and all subsequent assignments and transmissions of layout-design shall be prima
facie evidence of the validity thereof.
(2) In all legal proceedings as aforesaid, a registered layout-design shall not be held to be invalid on
the ground that it was not a registerable layout-design under section 7 except upon evidence of originality
and that such evidence was not submitted to the Registrar before registration

Frequently asked questions

What does Semiconductor Integrated Circuits Layoutdesign Act, 2000 Section 19 provide?

Section Section 19 of the Semiconductor Integrated Circuits Layoutdesign Act, 2000 (Registration to be prima facie evidence of validity.—) is reproduced on this page as part of the Semiconductor Integrated Circuits Layoutdesign Act, 2000. Lawyers and researchers use it to read the statutory wording before checking how courts have applied this section in reported judgments.

How do I find judgments on Semiconductor Integrated Circuits Layoutdesign Act, 2000 Section 19?

Open “Find citing judgments” on this page to search Supreme Court, High Court, and tribunal decisions that reference Semiconductor Integrated Circuits Layoutdesign Act, 2000 Section 19. Advanced act search can narrow results by court, year, or additional act filters.

Is the section text on SooperKanoon official?

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