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TypeBare Act JurisdictionCentral Government

Semiconductor Integrated Circuits Layout-design Act, 2000 Section 57

Penalty for Falsely Representing a Layout-design as Registered

~1 min read
https://sooperkanoon.com/act/41490

Bare act section · Research

About this section

Semiconductor Integrated Circuits Layout-design Act, 2000 Section 57 is part of Semiconductor Integrated Circuits Layout-design Act, 2000 - Penalty for Falsely Representing a Layout-design as Registered. Read the section text below and explore Indian court judgments that cite it.

Research copy - verify against official government publications before filing or court use.

Section Text

(1) No person shall make any representation with respect to a layout-design not being a registered layout-design, to the effect that it is a registered layout-design.

(2) If any person contravenes the provisions of sub-section (1), he shall be punishable with imprisonment for a term which may extend to six months, or with fine which may extend to fifty thousand rupees, or with both.

(3) For the purposes of this section, the use in India in relation to a layout-design of the word "registered", or of any other expression referring whether expressly or impliedly to registration, shall be deemed to import a reference to registration in the register, except--

(a) where that word or other expression is used in direct association with other words delineated in characters at least as large as those in which that word or other expression is delineated and indicating that the reference is to registration as a layout-design under the law of a country outside India being a country under the law of which the registration referred to is in fact in force; or

(b) where that other expression is of itself such as to indicate that the reference is to such registration as is mentioned in clause (a); or

(c) where that word is used in relation to a layout-design registered as a layout-design under the law of a country outside India and in relation solely to such layout-design.

Frequently asked questions

What does Semiconductor Integrated Circuits Layout-design Act, 2000 Section 57 provide?

Section Section 57 of the Semiconductor Integrated Circuits Layout-design Act, 2000 (Penalty for Falsely Representing a Layout-design as Registered) is reproduced on this page as part of the Semiconductor Integrated Circuits Layout-design Act, 2000. Lawyers and researchers use it to read the statutory wording before checking how courts have applied this section in reported judgments.

How do I find judgments on Semiconductor Integrated Circuits Layout-design Act, 2000 Section 57?

Open “Find citing judgments” on this page to search Supreme Court, High Court, and tribunal decisions that reference Semiconductor Integrated Circuits Layout-design Act, 2000 Section 57. Advanced act search can narrow results by court, year, or additional act filters.

Is the section text on SooperKanoon official?

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